The present invention relates to a method for manufacturing a nonvolatile memory device, and more particularly, to a method for manufacturing a nonvolatile memory device which is used to manufacture a NAND flash memory device.
In general, semiconductor memory devices are categorized into volatile memory devices and nonvolatile memory devices. In volatile memory devices, even though the input and output of data can be quickly implemented as in a dynamic random access memory (DRAM) and a static random access memory (SRAM), if a power supply fails or is turned off, input data is lost. In nonvolatile memory devices, even when a power supply fails or is turned off, stored data is retained continuously.
A flash memory device is a highly integrated nonvolatile memory device which has been developed by combining the advantages of an erasable programmable read only memory (EPROM) and an electrically erasable programmable read only memory (EEPROM). Programming refers to the operation of writing data into memory cells, and erasing refers to the operation of erasing the data written in memory cells.
A NAND flash memory device operates using an FN (Fowler-Nordheim) tunneling phenomenon such that programming is implemented by introducing electrons into floating gates, and erasing is implemented by discharging electrons from the floating gates. The NAND flash memory device is configured to include cell strings in each of which a plurality of memory cell transistors are connected in series. In the cell string, select transistors including a drain select transistor and a source select transistor are respectively connected in series to both ends of the memory cell transistors connected in series. The NAND flash memory device has advantages in that, since the amount of current flowing in the cell string is small, power consumption thereof is less than that of a NOR flash memory device. Also, because the high integration of the NAND flash memory device can be easily accomplished when compared to the NOR flash memory device, the NAND flash memory device is appropriate for the manufacture of a memory device having a large capacity. Due to these facts, recently, the NAND flash memory device has been widely used.
Usually, in the manufacture of the NAND flash memory device, in order to improve efficiency, the select transistors are formed in a process for forming the memory cell transistors. In the memory cell transistors, floating gates and control gates have to be insulated from each other, but, in the select transistors, floating gates and control gates have to be electrically connected with each other. After forming a dielectric layer on the floating gates of the memory cell transistors and the select transistors for the purpose of insulation, a contact hole defining process for removing portions of the dielectric layer formed in the select transistors is conducted. Thereafter, by forming the control gates of the memory cell transistors and select transistors, the floating gates and the control gates of the memory cell transistors are insulated from each other due to the presence of the dielectric layer, and the floating gates and the control gates of the select transistors are electrically connected with each other due to the presence of contact holes.
As the NAND flash memory device is rapidly scaled down and is highly integrated, the size of the contact holes defined in the dielectric layer gradually decreases. Thus, the mask pattern for defining the contact holes in the dielectric layer must be formed to have a fine size. However, due to a limit in the precision of exposure equipment, limitations necessarily exist in forming the mask pattern to have a fine size. Therefore, difficulties are caused in the process for finely defining the contact holes in the dielectric layer.